The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
For example, when fabricating field effect transistors (FETs), such as fin-like FETs (FinFETs), flowable chemical vapor deposition (FCVD) processes are frequently used in forming a dielectric material layer over a substrate. A typical FCVD process deposits a silicon-containing flowable material on the substrate to fill trenches and subsequently converts the flowable material to a solid material by an annealing process at a high temperature, such as 650 degrees Celsius (° C.). Such high temperature is desirable for creating high density silicon oxide in the solid material. However, it might have negative impact on doped features already existent in the substrate, such as n-type doped source/drain regions. In some cases, the annealing process might totally eliminate the tensile strain in the n-type doped substrate. Accordingly, the existing methods are not satisfactory in all respects.